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基于CSoC的HDLC设计实现
引用本文:贾华忠,陈晓曙.基于CSoC的HDLC设计实现[J].电子工程师,2006,32(6):17-19.
作者姓名:贾华忠  陈晓曙
作者单位:东南大学移动通信国家重点实验室,江苏省,南京市,210096
摘    要:给出了一种以8032微处理器为核、配备了FPGA(现场可编程门阵列)的双核芯片E5CSoC(可配置系统芯片)实现HDLC(高级数据链路控制)逻辑的方法,该方法利用片上的CSL(可配置系统逻辑)实现HDLC的帧结构和相关控制模块,并利用片内总线和片内集成的DMA(直接存储器存取)通道实现CSL和MCU(单片机)的数据交换,从而完成整个HDLC功能。该方法相对于专用芯片或FPGA实现表现出突出的灵活性、高效性,且集成度高、功耗小。

关 键 词:CSoC  单片机  HDLC  E5  FASTCHIP
收稿时间:2005-10-24
修稿时间:2006-01-18

Realization of HDLC Based on CSoC
JIA Huazhong,CHEN Xiaoshu.Realization of HDLC Based on CSoC[J].Electronic Engineer,2006,32(6):17-19.
Authors:JIA Huazhong  CHEN Xiaoshu
Institution:Southeast University, Nanjing 210096, China
Abstract:This article gives a method of implementation of HDLC with a double-core chip Triscend E5.The HDLC Frame structure and its corresponding control modules are realized by the Configurable System Logic(CSL) on chip while the interactions between CSL and MCU are realized with DMA channels intograted in the chip and inner bus.Compared to conventional methods such as soft programming or pure FGPA,the method presented has the advantage of high flexibility,low complexity,great efficiency,high scale of integration and low power consumption.
Keywords:CSoC  MCU  HDLC  E5  FASTCHIP  
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