低功耗多电压测试平台的架构

随着低功耗集成电路的发展,非常有必要对多电压测试平台的架构进行研究。这里对多电压测试平台架构的组成及部件进行逐一讨论,涉及编码规则、功耗目标和组件库建模等诸多方面,着重描述多电压设计测试平台的体系架构,特别是从单一电压环境移植到多电压环境的方法学。并对在建立多电压测试环境过程中出现的许多问题进行了讨论,诸如代码的编写、各种组件的建模和文件的格式等。

Architecture of Low Power-consumption and Multi-voltage Testbench

With the development of low-power integrated circuit,it is necessary to research and develop the architect of multi-voltage testbench. This paper specifically discusses the architecture composition and component of the multi-voltage testbench,including coding rules,power–consumption indexes and library modeling. It focuses on the architecture of the design for multi-voltage testbed,especially on the methodology for transplantation it from single-voltage environment to multi-voltage environment. Many problems occurred in the process of setting up multi-voltage test environment,are discussed in detail,such as coding practice,modeling of various elements,file formats,etc.