Coefficient Elimination Algorithm for Low Energy Distributed Arithmetic DCT Architectures

An energy aware DCT (Discrete Cosine Transform) architecture based on the distributed arithmetic concept is proposed. Architectures based on the distributed arithmetic concept are inherently low power as they are multiplication free algorithms. One characteristic of the DCT is that upon transformation signal energies are concentrated in only a few coefficients (less than 25%) with the rest (75%) of the coefficients being insignificant and negligible. One can skip the computation of these terms without seriously affecting the output signal quality. Exploiting this idea, we propose a low energy DCT architecture that can achieve 55% savings in the energy dissipation and 28 db in signal quality. In addition, we propose an adaptive energy aware DCT architecture that trades off energy consumption for signal quality. Using this adaptive architecture, we present a study of the effect of coefficient elimination on energy consumption and signal quality.Tarek K. Darwish received the B.S. and the M.S. degrees in computer engineering from the University of Balamand, Lebanon, and the M.S. degree, also in computer engineering, from the University of Louisiana at Lafayette, in 1996, 1998, and 2001, respectively. He received the Ph.D. degree from The Center for Advanced Computer Studies (CACS) at the University of Louisiana in Dec. 2003.From 2000–2003, he has been a research assistant in the CACS, in the VLSI Research group of M. Bayoumi, University of Louisiana. He has one patent pending. Since 2004 he is working as a senior component design engineer with Intel Corporation. His research interests include low power VLSI system design, Digital signal processing with special interest in image and video processing, computer architecture, and CAD-tools.Magdy A. Bayoumi received the B.Sc. and M.Sc. degrees in electrical engineering from Cairo University, Cairo, Egypt, and the M.Sc. degree in computer engineering from Washington University in St. Louis, MO, and the Ph.D. degree in electrical engineering from the University of Windsor, Windsor, ON, Canada.Currently, he is the Director of the Center for Advanced Computer Studies (CACS), Department Head of the Computer Science Department, the Edmiston Professor of Computer Engineering, and the Lamson Professor of Computer Science at The Center for Advanced Computer Studies, University of Louisiana at Lafayette, where he has been a faculty member since 1985. He has edited and co-edited three books in the area of VLSI Signal Processing. He was an Associate Editor of the Circuits and Devices Magazine and is currently an Associate Editor of Integration, the VLSI Journal, and the Journal of VLSI Signal Processing Systems. He is a Regional Editor for the VLSI Design Journal and on the Advisory Board of the Journal on Microelectronics Systems Integration. He has one patent pending. His research interests include VLSI design methods and architectures, low power circuits and systems, digital signal processing architectures, parallel algorithm design, computer arithmetic, image and video signal processing, neural networks, and wideband network architectures.Dr. Bayoumi received the 2003 IEEE Circuit and Systems Education Award, the 1993 Distinguished Professor Award and the University of Louisiana at Lafayette 1988 Researcher of the Year Award. He was an Associate Editor of the IEEE CIRCUITS AND DEVICES MAGAZINE, the IEEE TRANSACTIONS ON VLSI SYSTEMS, the IEEE TRANSACTIONS ON NEURAL NETWORKS, and the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING. From 1991 to 1994, he served on the Distinguished Visitors Program for the IEEE Computer Society, and he was on the Distinguished Lecture Program of the Circuits and Systems Society. He was the Vice President for the technical activities of the IEEE Circuits and Systems Society. He is the general chair of The IEEE International Symposium on Circuits and Systems—ISCAS in 2007. He was the Co-chairman of the Workshop on Computer Architecture for Machine Perception in 1993. He was the General Chairman of the 1994 MWSCAS and Co-chair of 22003 MWSCAS. He was the General Chairman for the 8th Great Lake Symposium on VLSI in 1998. He has been on the Technical Program Committee for ISCAS for several years and he was the Publication Chair for ISCAS99. He was also the General Chairman of the 2000 Workshop on Signal Processing Design and Implementation. He was a founding member of the VLSI Systems and Applications Technical Committee and was its Chairman. He is currently the Chairman of the Technical Committee on Circuits and Systems for Communication, and he was the chair of the Technical Committee on Signal Processing Design and Implementation. He is a member of the Neural Network and the Multimedia Technology Technical Committees. Currently, he is the faculty advisor for the IEEE Computer Student Chapter at the University of Louisiana at Lafayette. He is a fellow IEEE.