Analysis of multistage amplifiers with hybrid cascode feedforward compensation using a modified model for load impedance

Hybrid cascode feedforward compensation (HCFC) is an effective technique to stabilize nano-scale three-stage amplifiers driving ultra-large load capacitors. It divides the compensation capacitance and shares it between two high-speed local feedback loops embedded within the amplifier core. In this article, a systematic approach to analyze the transfer function and to evaluate the pole expressions of nano-scale HCFC amplifiers is presented. For the first time, the equivalent output impedance is successfully modeled to approximate the complicated transfer function of the HCFC amplifier without the need for lengthy pencil-and-paper calculations. An HCFC amplifier is designed and simulated in 90-nm CMOS technology, to verify the effectiveness of the new analytic approach. The simulated transfer function of the amplifier is almost identical to a calculated transfer function derived based on the new model.