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导通于放大状态的高速低压TTL与非门
引用本文:刘莹,方倩,方振贤,郭龙弟. 导通于放大状态的高速低压TTL与非门[J]. 电路与系统学报, 2009, 14(1)
作者姓名:刘莹  方倩  方振贤  郭龙弟
作者单位:1. 黑龙江大学,电子工程学院,黑龙江,哈尔滨,150080
2. 上海市地方税务局长宁区分局,上海,200051
基金项目:电子工程黑龙江省高校重点实验室项目,黑龙江省教育厅科学技术研究项目 
摘    要:本文在分析低压TTL门按传统方式实现高速的困难之后,首先提出一个利用射极跟随器钳位和反馈电路组成的导通于放大状态低压TTL电路,并设计出延迟时间tpd<1ns的高速低压TTL与非门.接着进行电路分析和参数估算.用计算机模拟证明理论和电路的正确性.

关 键 词:高速低压TTL门  导通于放大状态  射极跟随器  钳位和反馈电路

High-speed and low-voltage TTL AND-NOT gate to turn on amplification-state
LIU Ying,FANG Qian,FANG Zhen-xian,GUO Long-di. High-speed and low-voltage TTL AND-NOT gate to turn on amplification-state[J]. Journal of Circuits and Systems, 2009, 14(1)
Authors:LIU Ying  FANG Qian  FANG Zhen-xian  GUO Long-di
Affiliation:LIU Ying1,FANG Qian2,FANG Zhen-xian1,GUO Long-di1(1.College of Electronic Engineering,Heilongjiang University,Harbin 150080,China,2.Changning District Subbranch of Shanghai Local Taxes Bureau,shanghai 200051,China)
Abstract:After analyzing the difficulty to realize a high-speed and low-voltage TTL gate by tradition idea,a TTL circuits to turn on amplification-state by the using of emitter follower clamping-and-feedback circuit is presented and the high-speed and low-voltage TTL AND-NOT gate of delay-time tpd<1ns is designed mainly in this paper.Secondly,a circuit analysis and parameter estimate are made out for reference to improve at high-speed and low-voltage.The theory and circuits are verified by computer simulation.
Keywords:high-speed and low-voltage TTL gate  turn on amplification-state  emitter follower  clamping-and-feedback circuit  
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