0.18μm CMOS工艺栅极氧化膜可靠性的衬底和工艺依存性

用斜坡电压法(Voltage Ramp, V-ramp)评价了0.18μm双栅极 CMOS工艺栅极氧化膜击穿电量(Charge to Breakdown, Q_bd)和击穿电压(Voltage to Breakdown, V_bd). 研究结果表明，低压器件(1.8V)的栅极氧化膜(薄氧)p型衬底MOS电容和N型衬底电容的击穿电量值相差较小，而高压器件(3.3V)栅极氧化膜(厚氧)p衬底MOS电容和n衬底MOS电容的击穿电量值相差较大，击穿电压测试值也发现与击穿电量关键词：薄氧可靠性击穿电压击穿电量

Substrate and process dependence of gate oxide reliability of 0.18μm dual gate CMOS process

V-ramp method was used to evaluate gate oxide reliability of 0.18μm dual gate CMOS process. Charge of breakdown (Q_bd) and voltage of breakdown (V_bd) of gate oxide with n-type substrate and p-type substrate were extracted. It was found that for low voltage (thin oxide) gate oxide device the Q_bd of gate oxide of n-type substrate and p-type substrate are almost the same, but for high voltage (thick oxide) gate oxide device the Q_bd of n-type substrate and p-type substrate have a big difference. At the same time, Q_bd of gate oxide with p-substrate is bigger than that of gate oxide with n-substrate. The difference of Q_bd of thin gate oxide and thick gate oxide can be attributed to lithographic damage to the interface of poly-silicon gate and thick gate oxide. There is a big difference between the Weibull slopes of charge of breakdown of thin oxide and thick oxide. For the voltage of breakdown, Similar difference between n-substrate and p-substrate gate oxide was also observed. However, there is no big difference between the Weibull slopes of voltage of breakdown of thin oxide and thick oxide.