相关处理的并行算法及其硬件结构实现

在雷达、声呐和地震研究等许多信号处理场合,需要高速、长样本、高精度的数字相关器,随着新一代可编程数字信号处理芯片的发展,这种需要正在得到满足。本文介绍一种用TI公司的TMS320C25(以下简称C25)芯片实现的具有流水线结构的长样本数字相关器,其速度和精度由芯片本身的性能得到保证。本文讨论了实现长样本相关运算的并行处理算法,这种算法具有普遍意义;也给出了用C25芯片实现的相关器硬件结构和软件框图。

A parallel algorithm of correlation processing and its hardware architecture realization

A digital correlator with high speed, high precision and long sample is necessary for rader, sonar and earthquake reseach. With the development of new programmable digital signal processing (DSP) chip,this need is becoming content. In this paper, a parallel algorithm with pipeline architecture for long sample digital correlation is proposed and realized by high speed DSP device. The speed and precision of this kind of algorithm is ensured by DSP's Performance. Some experiments show that the algorithm is of universal significance. Lastly, as an example, the hardware architecture and software flow scheme of 1024 points digital correlator made of multichip TMS320C25 are given.