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Passive, “self-trapped family” all-optical half adder using all-optical XOR and AND gates
Authors:Ram Krishna Sarkar  S. Medhekar
Affiliation:(1) Department of Applied Physics, Birla Institute of Technology, Mesra, Ranchi, India
Abstract:The paper presents an alternative novel approach to obtain all-optical logic. We show that XOR, NOT, and AND logic could be obtained by appropriately setting parameter of all-optical passive transistor. An AND gate followed by NOT gives NAND logic (building block) that, in principle can provide complete set of passive, fiber compatible “self-trapped family” all-optical logic gates (with Boolean completeness) and may find many possibilities in the area of all-optical computing. To give one example, we propose all-optical half adder.
Keywords:42.65-k  42.65.Jx  42.65.Pc  42.79.Ta
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