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High temperature characteristics of ZnO-based MOS-FETs with a photochemical vapor deposition SiO2 gate dielectric |
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| Authors: | SJ Young CH Hsiao LW Ji TP Chen KJ Chen |
| Institution: | a Department of Electronic Engineering, National Formosa University, Huwei, Yunlin 632, Taiwan b Institute of Microelectronics and Department of Electrical Engineering, Advanced Optoelectronic Technology Center, Center for Micro/Nano Science and Technology, National Cheng Kung University, Tainan 701, Taiwan c Institute of Electro-Optical and Materials Science, National Formosa University, Huwei, Yunlin 632, Taiwan d Institute of Electro-Optical Science Engineering, National Cheng Kung University, Tainan 70101, Taiwan |
| Abstract: | The authors report the fabrication of ZnO-based metal-oxide-semiconductor field effect transistors (MOSFETs) with a high quality SiO2 gate dielectric by photochemical vapor deposition (photo-CVD) on a sapphire substrate. Compared with ZnO-based metal-semiconductor FETs (MESFETs), it was found that the gate leakage current was decreased to more than two orders of magnitude by inserting the photo-CVD SiO2 gate dielectric between ZnO and gate metal. Besides, it was also found that the fabricated ZnO MOSFETs can achieve normal operation of FET, even operated at 150 °C. This could be attributed to the high quality of photo-CVD SiO2 layer. With a 2 μm gate length, the saturated Ids and maximum transconductance (Gm) were 61.1 mA/mm and 10.2 mS/mm for ZnO-based MOSFETs measured at room temperature, while 45.7 mA/mm and 7.67 mS/mm for that measured at 150 °C, respectively. |
| Keywords: | A Thin films D Electrical properties |
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