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嵌入式AES加密存储器的硬件实现
引用本文:冯妮,张会新,卢一男.嵌入式AES加密存储器的硬件实现[J].电视技术,2013,37(3).
作者姓名:冯妮  张会新  卢一男
作者单位:山西太原中北大学电子测试技术重点实验室,山西太原中北大学电子测试技术重点实验室,山西太原中北大学电子测试技术重点实验室
基金项目:国家自然科学基金项目(面上项目,重点项目,重大项目)
摘    要:本设计主要介绍一种基于FPGA的AES硬件加密系统,实现电子数据的加密及存储。文中详细说明了AES加密算法的FPGA架构,AES核心算法的接口时序设计,AES加密存储器的硬件设计以及算法验证。硬件加密较之软件加密有实时性高、数据量大以及性能好的特点。FPGA开发周期短的特点与AES灵敏性好、实现效率高、安全性能高的优势相辅相成,为需要保密的电子数据提供更加可靠的保证。

关 键 词:AES  FPGA  数据加密  加密存储器
收稿时间:2012/7/25 0:00:00
修稿时间:9/1/2012 12:00:00 AM

Implementation of Embedded AES Encryption Algorithm in hardware
fengni,zhanghuixin and luyinan.Implementation of Embedded AES Encryption Algorithm in hardware[J].Tv Engineering,2013,37(3).
Authors:fengni  zhanghuixin and luyinan
Institution:Key Laboratory of Instrumentation Science & Dynamic Measurement(North University of China),Ministry of Education of Shanxi, Taiyuan,Key Laboratory of Instrumentation Science & Dynamic Measurement(North University of China),Ministry of Education of Shanxi, Taiyuan,Science and Technology on Electronic Test & Measurement Laboratory (North University of China), Taiyuan, Shanxi
Abstract:This paper mainly introduces an AES hardware encryption system to achieve the target data encryption based on FPGA. It describes in detail the overall structure of AES encryption algorithm, the interface timing design of the core algorithm,hardware design of AES encryption memory and algorithm verification. Hardware encryption, than software encryption, has the characteristics of real-time, large volumes of data and good performance.FPGA has a short development cycle, and AES has some advantages of good sensitivity, high efficiency and high safety performance. They complementary provide a more reliable guarantee for the confidential and electronic data.
Keywords:AES  FPGA  Data encryption  Encryption memory
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