Engineering of tunnel barrier for highly integrated nonvolatile memory applications

In this paper, the engineered tunnel barrier technology is introduced by using the engineered tunnel barrier of VARIOT type (SiO₂/Si₃N₄/SiO₂) and CRESTED type (Si₃N₄/SiO₂/Si₃N₄) with Si₃N₄ and high-k HfO₂ layers as charge trapping layers, respectively. In addition, the high-k stacked VARIOT type of SiO₂/HfO₂/Al₂O₃ and Al₂O₃/HfO₂/Al₂O₃ are compared with O/N/O tunnel barrier memory. As a result, the engineered tunnel barrier memory device showed excellent memory characteristics compared to the single SiO₂ tunnel barrier memory device, such as very high P/E (program/erase) speed, good retention time and no degradation in endurance characteristics.