Design of a 3780-point IFFT processor for TDS-OFDM |
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| Authors: | Zhi-Xing Yang Yu-Peng Hu Chang-Yong Pan Lin Yang |
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| Institution: | Dept. of Electron. Eng., Tsinghua Univ., Beijing ; |
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| Abstract: | This correspondence presents a design of 3780-point IFFT processor for TDS-OFDM terrestrial DTV transmitter using FPGA. It demonstrates the algorithm design and error analysis of the processor, which can achieve a throughput of 7.56M complex IFFT operations per second. This design meets the signal-to-quantization noise ratio requirement of the TDS-OFDM system. It consists of two FPGA and one dual-port RAM. The data stream pipeline algorithm is implemented |
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