Mismatch of dielectric constants at the interface of nanometer metal-oxide-semiconductor devices with high-<Emphasis Type="Italic">K</Emphasis> gate dielectric impacts on the inversion charge density |
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Authors: | LING-FENG MAO |
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Institution: | (1) Department of Ceramics and Glass Engineering/CICECO, University of Aveiro, 3810-195 Aveiro, Portugal;(2) School of Physics, University of Hyderabad, Hyderabad, 500046, India |
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Abstract: | The comparison of the inversion electron density between a nanometer metal-oxide-semiconductor (MOS) device with high-K gate dielectric and a SiO2 MOS device with the same equivalent oxide thickness has been discussed. A fully self-consistent solution of the coupled Schr?dinger–Poisson
equations demonstrates that a larger dielectric-constant mismatch between the gate dielectric and silicon substrate can reduce
electron density in the channel of a MOS device under inversion bias. Such a reduction in inversion electron density of the
channel will increase with increase in gate voltage. A reduction in the charge density implies a reduction in the inversion
electron density in the channel of a MOS device. It also implies that a larger dielectric constant of the gate dielectric
might result in a reduction in the source–drain current and the gate leakage current. |
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Keywords: | |
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