| 一个用于12位40-MS/s低功耗流水线ADC的MDAC电路设计 |
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| 引用本文： | 陈利杰,周玉梅.一个用于12位40-MS/s低功耗流水线ADC的MDAC电路设计[J].微电子学与计算机,2011,28(1):108-112. |
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| 作者姓名： | 陈利杰 周玉梅 |
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| 作者单位： | 中国科学院,微电子研究所,北京,100029 |
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| 摘 要： | 文中设计了一个用于12位40MHz采样率低功耗流水线ADC的MDAC电路.通过对运放的分时复用,使得一个电路模块实现了两级MDAC功能,达到降低整个ADC功耗的目的.通过对MDAC结构的改进,使得该模块可以达到12bit精度的要求.通过优化辅助运放的带宽,使得高增益运放能够快速稳定.本设计在TSMC0.35μmmixsignal3.3V工艺下实现,在40MHz采样频率下,以奈奎斯特采样频率满幅(Vpp=2V)信号输入,其SINAD为73dB,ENOB为11.90bit,SFDR为89dB.整个电路消耗的动态功耗为9mW.
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| 关 键 词： | 流水线模数转换 采样保持 运算放大器 |
A MDAC Circuit for 12-bit 40-MS/s Low Power Pipelined A/D Converters |
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| CHEN Li-jie,ZHOU Yu-mei.A MDAC Circuit for 12-bit 40-MS/s Low Power Pipelined A/D Converters[J].Microelectronics & Computer,2011,28(1):108-112. |
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| Authors: | CHEN Li-jie ZHOU Yu-mei |
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| Institution: | CHEN Li-jie,ZHOU Yu-mei(Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China) |
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| Abstract: | A MDAC circuit for 12bit 40MS/s low power pipelined A/D converters is presented.The low power is achieved by using the same OTA in two MDAC stages at different time.A modified MDAC reaching 12bit accuracy was designed.A gain boosted telescopic cascode amplifier was designed by optimizing the GBW of the auxiliary amplifier.The circuit is simulated and analyzed based on TSMC 0.35μm 3.3V CMOS process.Simulation results show that the ENOB is 11.9bit,SFDR is 89dB,SNDR is 73dB.The circuit consumes 9mW. |
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| Keywords: | pipelined A/D converter MDAC amplifier |
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