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Synchronization in coupled Ikeda delay systems |
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| Authors: | D. Valli B. Muthuswamy S. Banerjee M.R.K. Ariffin A.W.A. Wahab K. Ganesan C.K. Subramaniam J. Kurths |
| Affiliation: | 1. TIFAC-CORE, Vellore Institute of Technology, Vellore, India 2. Milwaukee School of Engineering, Milwaukee, USA 3. Institute for Mathematical Research, Universiti Putra Malaysia, Putra, Malaysia 4. Mathematics Department, Faculty of Science, Universiti Putra, Putra, Malaysia 5. Faculty of Computer Science & Information Technology, University of Malaya, Putra, Malaysia 6. Humboldt University, Berlin and Potsdam Institute for Climate Impact Research, Berlin, Germany |
| Abstract: | In this work, we demonstrate the use of a Field Programmable Gate Array (FPGA) as a physical platform for realizing chaotic delay differential equations (DDE). Moreover, using our platform, we also experimentally study the synchronization between two time delayed systems. We illustrate two different experimental approaches – one is hardware co-simulation (using a Digilent Atlys with a Xilinx Spartan-6 FPGA) and the other is analog output (using a Terasic DE2-115 with an Altera Cyclone IV E FPGA). |
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