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基于并联开关技术的ECL电路设计
引用本文:姚茂群,陈华华,沈继忠. 基于并联开关技术的ECL电路设计[J]. 浙江大学学报(理学版), 2001, 28(2): 144-148
作者姓名:姚茂群  陈华华  沈继忠
作者单位:1. 杭州师范学院计算机系,
2. 浙江大学信息与电子工程学系,
基金项目:浙江省自然科学基金!资助项目 (6 96 0 42 ),浙江省教委资助!项目 (6 42 9811138)
摘    要:本文首先指出了采用电压信号的多值电路中,在多个开关串联时存在的问题,进而提出了适合于ECL电路设计的两种将串联开关转换成并联开关的方法,并具体设计了采用并联开关的三值ECL电路。设计实例表明这些方法具有简便、规范的特点。用PSPICE对设计的电路进行模拟得到的结果表明,采用并联开关技术设计的电路不仅具有正确的逻辑功能,而且比采用串联开关设计的电路具有更快的速度。

关 键 词:开关信号理论 ECL电路 多值电路 关联开关技术 数字电路 开关级设计
文章编号:1008-9497(2001)02-0144-05
修稿时间:2000-06-12

Design of ECL circuits based on parallel switches technique.
YAO Mao-qun,CHEN Hua-hua,SHEN Ji-zhong. Design of ECL circuits based on parallel switches technique.[J]. Journal of Zhejiang University(Sciences Edition), 2001, 28(2): 144-148
Authors:YAO Mao-qun  CHEN Hua-hua  SHEN Ji-zhong
Affiliation:YAO Mao qun+1,CHEN Hua hua+2,SHEN Ji zhong+2
Abstract:Starting from the problems of multi|valued logic circuits using voltage as signal which are designed with cascade switches, two methods for converting cascade switches to parallel switches which are suitable for ECL circuits design were proposed. Using these methods, several ternary ECL circuits with parallel switches were designed, and the design examples show the two methods have the characteristics of simple and normative. The simulation result using PSPICE shows that the designed circuits not only have the correct logic functions, but also have smaller propagation delay than the counterparts designed with cascade switches.
Keywords:switch signal theory  ECL circuits  multi valued circuits  parallel switches
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