A 4H-SiC trench MOSFET structure with wrap N-type pillar for low oxide field and enhanced switching performance |
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Affiliation: | 1.The Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Hangzhou 310018, China;2.The School of Mechanical and Electronic Engineering, Pingxiang University, Pingxiang 337055, China |
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Abstract: | An optimized silicon carbide (SiC) trench metal-oxide-semiconductor field-effect transistor (MOSFET) structure with side-wall p-type pillar (p-pillar) and wrap n-type pillar (n-pillar) in the n-drain was investigated by utilizing Silvaco TCAD simulations. The optimized structure mainly includes a p$+$ buried region, a light n-type current spreading layer (CSL), a p-type pillar region, and a wrapping n-type pillar region at the right and bottom of the p-pillar. The improved structure is named as SNPPT-MOS. The side-wall p-pillar region could better relieve the high electric field around the p$+$ shielding region and the gate oxide in the off-state mode. The wrapping n-pillar region and CSL can also effectively reduce the specific on-resistance ($R_{rm on,sp}$). As a result, the SNPPT-MOS structure exhibits that the figure of merit (FoM) related to the breakdown voltage ($V_{rm BR}$) and $R_{rm on,sp}$ ($V_{rm BR}^{2}R_{rm on,sp}$) of the SNPPT-MOS is improved by 44.5%, in comparison to that of the conventional trench gate SJ MOSFET (full-SJ-MOS). In addition, the SNPPT-MOS structure achieves a much faster-witching speed than the full-SJ-MOS, and the result indicates an appreciable reduction in the switching energy loss. |
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Keywords: | 4H-silicon carbide (4H-SiC) trench gate MOSFET breakdown voltage (VBR) specific on-resistance (Ron sp) switching energy loss super-junction |
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