Design of Down-Sampling Processors for Radio Communications |
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Authors: | Adel Ghazel Lirida Naviner Khaled Grati |
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Affiliation: | (1) École Supérieure des Communications (SUP'COM), 2088 Parc Technologique, El Ghazela, Tunisia;(2) École Nationale Suprieure des Télécommunications, 46 rue Barrault, 75634 Paris Cedex 13, France |
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Abstract: | This paper deals with design and implementation of digital filter processors to be used as down-samplers in wireless transceivers. We consider a homodyne direct conversion and propose an improved method to specify each stage of the cascade structure. The proposed scheme results in a globally compact implementation. The method is detailed for DECT standard and illustrated by a fixed point FPGA based implementation. |
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Keywords: | radio communications wireless transceiver multimode digital decimation filtering sigma delta conversion |
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