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SoC中嵌入式SRAM的BIST测试方法研究
引用本文:张力,罗胜钦.SoC中嵌入式SRAM的BIST测试方法研究[J].电子与封装,2007,7(11):27-30.
作者姓名:张力  罗胜钦
作者单位:同济大学电信学院,上海,200092
摘    要:随着集成电路设计规模的不断增大,在系统芯片SoC(System on a Chip)中嵌入大量的SRAM存储器的设计方法变得越来越重要。文中介绍了SRAM的典型故障类型和几种常用的测试方法,同时详细分析了嵌入式SRAM存储器内建自测试的实现原理以及几种改进的March算法,另外,以16k×32bitSRAM为例,给出了SRAM内建自测试的一种典型实现,并在Altera-EP1S25上实现。

关 键 词:嵌入式SRAM存储器  内建自测试  March算法
文章编号:1681-1070(2007)11-0027-04
修稿时间:2007-09-20

Research of Embedded SRAM Build-in Self-test in the SoC
ZHANG Li,LOU Sheng-qin.Research of Embedded SRAM Build-in Self-test in the SoC[J].Electronics & Packaging,2007,7(11):27-30.
Authors:ZHANG Li  LOU Sheng-qin
Institution:Telecom Department of Tongji University, Shanghai 200092, China
Abstract:With the growth of the integrated circuits, the design method for large numbers of SRAMs embed (in a chip and particularly) in SoCs is becoming more and more important. Some typical faults and test methods of SRAM are introduced in this article. The principle of the SRAM build-in self-test achieving and some advanced algorithms of march are analyzed in details and a typical design method of SRAM BIST is introduced by designing BIST circuits of 16k×32bit SRAM and is implemented on the Altera-EP1S25.
Keywords:embedded SRAM  build-in self-test  march algorithm
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