一种改进的基于SAT的多错误诊断算法

改进了二种组合电路设计错误诊断DED（Design Error Diagnosis）算法。它使用多可满足性问题（SAT）求解技术，通过对布尔可满足解计数来实现对多个逻辑错误的诊断定位。改进了电路诊断架构，新架构的合取范武表述所使用的变量和子句数目大为减少；通过多种启发武方法，避免了不必要的操作，使算法在时间和内存上保持有效性。

SAT-based Algorithm for Multiple Design Error Diagnosis

A design error diagnosis algorithm for combinational circuits is presented. It can pedorm model-free logic error location by counting sat solutions with an all-solution SAT solver, Our algorithm offers two major advantages over existing methods. Firstly, we reduce the variablos and the clauses using a novel diagnosis configuration. Secondly, a number of heuristics are proposed that keep the method memory and ran-time efficient.