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一种CCD彩色摄像系统的视频锁相同步系统
引用本文:江洁,郁道银,陈冬青,王金刚.一种CCD彩色摄像系统的视频锁相同步系统[J].电视技术,2000(1):63-65.
作者姓名:江洁  郁道银  陈冬青  王金刚
作者单位:1. 天津大学,精密仪器及光电子工程学院,天津300072
2. 天津大学,电子信息工程学院,天津,300072
摘    要:介绍一种应用于CCD彩色摄像系统的视频锁相同步系统。基于锁相理论的视频锁相同步系统是一个二级锁相环路,包括同步信号发生电路和高频点像素时钟电路。并详细阐述了同步信号发生电路和高频点像素时钟电路的锁相原理及电路。高频点像 时钟电路的外分频电路是由现场可编门阵列实例可编程特必珂得到不同频率的高频点像素时钟。

关 键 词:CCD  摄像系统  视频锁相  高步系统

The video phase locked synchronization system for CCD color camera
Jiang Jie and Yu Daoyin et al.The video phase locked synchronization system for CCD color camera[J].Tv Engineering,2000(1):63-65.
Authors:Jiang Jie and Yu Daoyin
Institution:Jiang Jie and Yu Daoyin et al
Abstract:This paper introduces the design and implementation of the video phase locked synchronism system for CCD color camera. The system clock based on the theory of phase-locked loop(PLL) is a two level PLLincluding the circuit of the synchronization signals and highfrequency pixel clock. The paper describes the phaselocked principle and the circuit of the synchronization signals and high-frequency pixel clock in detail. Field programmable gate array (FPGA) is adopted to implement the external devider of pixel clock. With its field programmable feature, the clock of defferent frequency can be obtained.
Keywords:video phase locked synchronism: phase-locked loop  synchronization signals  high-frequencypixel clock  field programmable gate array(FPGA)  
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