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CMOS数控振荡器设计
引用本文:周国飞,龚敏,邬齐荣.CMOS数控振荡器设计[J].电子与封装,2010,10(8):27-30.
作者姓名:周国飞  龚敏  邬齐荣
作者单位:四川大学物理科学与技术学院微电子技术四川省重点实验室,成都,610064
摘    要:设计并讨论了一种新颖的完全基于CMOS静态逻辑反相器设计的数字控制振荡器DCO结构(Digitally-Controlled Oscillator),这种数字控制振荡器采用全数字电路构成,较之LC振荡器更加易于设计和制造,适合于高频高性能数字锁相环的应用。电路结构的仿真采用Spectre仿真器,基于STMicroelectronics CMOS 90nm工艺,在1.2V电源电压下实现了1GHz~6GHz的数控振荡频率变化范围,功耗为0.1mW~3mW,10MHz的频率偏移处的相位噪音约为-114dBc/Hz。

关 键 词:数字压控振荡器  CMOS反相器  环形振荡器  低噪音设计

Design of an Atatic-CMOS based Digital-Controlled Oscillator
ZHOU Guo-fei,GONG Min,WU Qi-rong.Design of an Atatic-CMOS based Digital-Controlled Oscillator[J].Electronics & Packaging,2010,10(8):27-30.
Authors:ZHOU Guo-fei  GONG Min  WU Qi-rong
Institution:ZHOU Guo-fei,GONG Min,WU Qi-rong(Microelectronic Technology Sichuan Key Laboratory,School of Physical Science and Technology,Sichuan University,Chengdu 610064,China)
Abstract:A novel structure of CMOS-static-logic inverter based DCO(Digitally-Controlled Oscillator)is designed in this thesis.This DCO structure is analysis with Cadence Spectre Simulator.Based on STMicroelectronics CMOS 90nm Technology,this DCO can provide a digitally tuning range from 1GHz to 6GHz with a power dissipation varied from 0.1mW to 3mW.With noise analysis,the phase noise at 10MHz offset frequency is-114dBc/Hz.
Keywords:digitally-controlled oscillator  CMOS inverter  ring oscillator  low noise design  
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