基于FPGA的PCIe接口逻辑设计与实现

为了提升高速串行计算机扩展总线标准(PCIe)总线互联设备在高速通信过程中的系统性能,减少对中央处理器(CPU)资源的占用,基于Kintex-7系列现场可编程逻辑门阵列(FPGA)平台进行总线主控式直接存储访问(DMA)设计,通过PCIe接口实现了主机设备(PC)与FPGA设备之间的高性能数据传输.同时,基于Root ...

Design and implementation of PCIe interface logic based on FPGA

The bus master Direct Memory Access(DMA) controller is implemented based on the Kintex-7 series Field Programmable Gate Array(FPGA) platform in order to improve the system performance of Peripheral Component Interconnect express(PCIe) bus interconnection devices in the process of high-speed communication and reduce the consumption of Central Processing Unit(CPU) resources. The high performance data transmission between Personal Computer(PC) and FPGA via PCIe is realized. DMA test cases are designed through the Root Port simulation platform, and the simulation results verify the correctness of the PCIe interface logic. The actual transmission rate is tested through the master computer and driver, and the experimental results show that the measured highest transfer rates are 1 620 MB/s on write and 1 427 MB/s on read, which reaches 84% of the theoretical maximum. The design scheme bears the advantages of low cost and high reliability, and can meet the requirements of data acquisition with high performance and low delay.