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Polycrystalline silicon S-diode fabricated using phosphorus thermal diffusion along grain boundaries
Authors:R. Aliev  B. M. Abdurakhmanov  R. R. Bilyalov
Affiliation:(1) Institute of Electronics, Academgorodok, 700143 Tashkent, Uzbekistan;(2) Present address: Fraunhofer Institute for Solar Energy Systems, Oltmannstraße 5, D-79100 Frelburg, Germany
Abstract:Electrical activity of grain boundaries (GB) in polycrystalline silicon films can stand duty as an additional factor of action on its properties. At present paper it has been studied polycrystalline silicon epitaxial films grown by CVD-method at low-resistivity n+-type poly-Si substrates. A p+-n junction of 0,5 mgrm deep was formed by ion implantation of boron. The effect of thermal annealing (TA) on I-V characteristics of the p+-n-n+ structures was studied. It was founded that the region with negative resistivity is appeared in I-V characteristic after TA in vacuum at 800°C for 1 hour. Investigations by means of C-V and temperature characteristics of samples show that the S-image of the I-V characteristics is caused by phosphorus diffusion along GB that give rise to conduction of the charge carriers along GB. For the first time it was shown the opportunity of the creation of low-cost poly-Si S-diode by TA.
Keywords:polycrystalline silicon  grain boundaries  phosphorus diffusion
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