| 码率可配置Turbo译码器设计与实现 |
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| 引用本文： | 宋英杰. 码率可配置Turbo译码器设计与实现[J]. 现代导航, 2015, 6(4): 367-371 |
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| 作者姓名： | 宋英杰 |
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| 作者单位： | 中国电子科技集团公司第二十研究所,西安 710068 |
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| 摘 要： | 本文介绍了码率可配置 Turbo 译码器的 FPGA 设计与实现。可配置 Turbo 译码器可灵活支持 1/3、1/6、1/10 三种码率，减少了器件使用规模和资源，并支持固定迭代次数译码和动态迭代译码。码率可配置 Turbo 译码器最终在 Xilinx 公司的 XC7K325T-2FFG900I 芯片上实现。
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| 关 键 词： | Turbo 译码器；可配置；FPGA |
Design and Implement on Code Rate Configurable Turbo Decoder |
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| SONG Yingjie. Design and Implement on Code Rate Configurable Turbo Decoder[J]. Modern Navigation, 2015, 6(4): 367-371 |
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| Authors: | SONG Yingjie |
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| Abstract: | In this paper, FPGA design and implement on code rate configurable Turbo Decoder are introduced. Configurable Turbo decoder supports three code rates: 1/3, 1/6, 1/10 flexibly which decreases the resource consume. Turbo decoder supports fixed iterative times and dynamic iterative times. Code rate configurable Turbo decoder has been implemented on the FPGA chip XC7K325T-2FFG900I of Xilinx Company. |
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