Strained and strain-relaxed epitaxial Ge1-xSnx alloys on Si（100） substrates

Epitaxial Ge1-xSnx alloys are grown separately on a Ge-buffer/Si(100) substrate and directly on a Si(100) substrate by molecular beam epitaxy (MBE) at low temperature. In the case of the Ge buffer/Si(100) substrate, a high crystalline quality strained Ge0.97Sn0.03 alloy is grown, with a χmin value of 6.7% measured by channeling and random Rutherford backscattering spectrometry (RBS), and a surface root-mean-square (RMS) roughness of 1.568 nm obtained by atomic force microscopy (AFM). In the case of the Si(100) substrate, strain-relaxed Ge0.97Sn0.03 alloys are epitaxially grown at 150°C-300°C, with the degree of strain relaxation being more than 96%. The X-ray diffraction (XRD) and AFM measurements demonstrate that the alloys each have a good crystalline quality and a relatively flat surface. The predominant defects accommodating the large misfit are Lomer edge dislocations at the interface, which are parallel to the interface plane and should not degrade electrical properties and device performance.

Strained and strain-relaxed epitaxial Ge1-xSnx alloys on Si(100) substrates

Epitaxial Ge_1-xSn_x alloys are grown separately on a Ge-buffer/Si(100) substrate and directly on a Si(100) substrate by molecular beam epitaxy (MBE) at low temperature. In the case of the Ge buffer/Si(100) substrate, a high crystalline quality strained Ge_0.97Sn_0.03 alloy is grown, with a χ_min value of 6.7% measured by channeling and random Rutherford backscattering spectrometry (RBS), and a surface root-mean-square (RMS) roughness of 1.568 nm obtained by atomic force microscopy (AFM). In the case of the Si(100) substrate, strain-relaxed Ge_0.97Sn_0.03 alloys are epitaxially grown at 150℃-300℃, with the degree of strain relaxation being more than 96%. The X-ray diffraction (XRD) and AFM measurements demonstrate that the alloys each have a good crystalline quality and a relatively flat surface. The predominant defects accommodating the large misfit are Lomer edge dislocations at the interface, which are parallel to the interface plane and should not degrade electrical properties and device performance.