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STATE VERIFICATION FOR SYNCHRONOUS CIRCUITS
作者姓名:He  Xinhua  Gong  Yunzhan  Fu  Qingling
作者单位:Armored Force Engineering Institute,Beijing 100072
基金项目:Supported by the National Natural Science Foundation of China
摘    要:This paper presents the techniques of implicit traversing and state verification for sequential finite state machines(FSMs) based of on the state collapsing of state transition graph(STG). The problems of state designing are described. In order to achieve high state enumeration coverage, heuristic knowledge is proposed.


State verification for synchronous circuits
He Xinhua Gong Yunzhan Fu Qingling.STATE VERIFICATION FOR SYNCHRONOUS CIRCUITS[J].Journal of Electronics,1997,14(2):165-168.
Authors:He Xinhua  Gong Yunzhan  Fu Qingling
Institution:(1) Armored Force Engineering Institute, 100072 Beijing
Abstract:This paper presents the techniques of implicit traversing and state verification for sequential finite state machines(FSMs) based of on the state collapsing of state transition graph(STG). The problems of state designing are described. In order to achieve high state enumeration coverage, heuristic knowledge is proposed.
Keywords:Verification  Enumeration  State transition graph  Binary decision diagram
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