| 一种通用可编程数字频率合成器的设计 |
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| 引用本文： | 李强 徐重阳. 一种通用可编程数字频率合成器的设计[J]. 微电子学, 1998, 28(5): 354-357 |
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| 作者姓名： | 李强 徐重阳 |
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| 摘 要： | 讨论了锁相式频率合成器的基本原理，设计了一种通用可编程锁相式频率合成器，介绍了其编程置型格式，提出了一种可提高程控分频器工作频率的电路设计方法，并给出了其模拟波形。该电路的最高合成频率为１００ＭＨｚ最小频率间隔为１００Ｈｚ，在工程上具有广泛的应用前景。
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| 关 键 词： | 模拟集成电路 锁相环 频率合成器 分频器 |
Design of a CMOS Programmable Frequency Synthesizer |
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| Abstract: | A universal programmable frequency synthesizer has been designed. The format of programming is described in detail. A design method to increase the operating frequency of the programmable frequency divider is presented, and its simulation results are given. A maximum synthesizing frequency of 100 MHz and a minimum step of 100 Hz have been achieved for the circuit, which can be widely used in engineering applications. |
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| Keywords: | Analog IC Phase locked loop Frequency synthesizer Frequency divider |
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