Electrical characterization and carrier transportation in Hf-silicate dielectrics using ALD gate stacks for 90 nm node MOSFETs |
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Authors: | H.W. Chen K.C. Chen C.H. Liu F.C. Chiu K.W. Liu L.W. Cheng C.T. Lin S.W. Sun |
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Affiliation: | a Institute of Mechatronic Engineering, National Taipei University of Technology, 1, Sec. 3, Chung-Hsiao E. Road, Taipei 106, Taiwan b Department of Electronic Engineering, Ming Chuan University, No. 5. De-Ming Road, Gui-Shan, Taoyuan County 333, Taiwan c Central R&D Division, United Microelectronics Corp. (UMC), Taiwan |
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Abstract: | Metal-oxide-semiconductor capacitors (MOSCs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) incorporating hafnium silicate (Hf-silicate) dielectrics were fabricated by using atomic layer deposition (ALD). The electrical properties of these Hf-silicate thin films with various postnitridation annealing (PNA) temperatures were then examined to find the best nitridation condition. It is found that the best conditions to achieve the lowest gate leakage current and best equivalent oxide thickness (EOT) are when PNA is performed at 800 °C in NH3 ambient for 60 s. To understand the obtained film, carrier transportation mechanisms, the temperature dependence of the leakage current was measured from 300 K to 500 K for both gate injection and substrate injection. The result reveals that the leakage mechanisms involve Schottky emission at high temperature and low electrical field and Poole-Frenkle emission at low temperature and high electrical field. The barrier heights of poly-Si/Hf-silicate and Hf-silicate/Si interfaces extracted from Schottky emission are 1.1 eV and 1.04 eV, respectively. The interface traps per unit area, the mean density of interface traps per area and energy and the mean capture cross-section are determined about 8.1 × 1010 cm−2, 2.7 × 1011 cm−2 eV−1 and 6.4 × 10−15 cm−2 using charge pumping method. |
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Keywords: | 68.47.Fg 68.60.Dv 68.35.Gy 68.47.Gh |
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