| 基于非线性DAC的高速直接数字频率合成器 |
| |
| 引用本文： | 袁凌,倪卫宁,郝志坤,石寅,李文昌.基于非线性DAC的高速直接数字频率合成器[J].半导体学报,2009,30(9):095003-4. |
| |
| 作者姓名： | 袁凌 倪卫宁 郝志坤 石寅 李文昌 |
| |
| 摘 要： | This paper presents a high speed ROM-less direct digital frequency synthesizer （DDFS） which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place of the ROM look-up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS. The design procedure for implementing the nonlinear DAC is presented. To ensure high speed, current mode logic （CML） is used. The chip is implemented in Chartered 0.35μm COMS technology with active area of 2.0 × 2.5 mm^2 and total power consumption of 400 mW at a single 3.3 V supply voltage. The maximum operating frequency is 850 MHz at room temperature and 1.0 GHz at 0℃.
|
| 关 键 词： | 直接数字频率合成器 线性分段 DAC 非线性 ROM查找表 设计过程 电流模式 有效面积 |
| 收稿时间： | 2/14/2009 2:53:52 PM |
| 修稿时间： | 4/21/2009 3:01:09 PM |
A high speed direct digital frequency synthesizer realized by a segmented nonlinear DAC |
| |
| Yuan Ling,Ni Weining,Hao Zhikun,Shi Yin and Li Wenchang.A high speed direct digital frequency synthesizer realized by a segmented nonlinear DAC[J].Chinese Journal of Semiconductors,2009,30(9):095003-4. |
| |
| Authors: | Yuan Ling Ni Weining Hao Zhikun Shi Yin and Li Wenchang |
| |
| Institution: | Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China;University of Electronic Science and Technology of China, Chengdu 610054, China |
| |
| Abstract: | direct digital frequency synthesizer nonlinear DAC segmented ROM-less CML |
| |
| Keywords: | direct digital frequency synthesizer nonlinear DAC segmented ROM-less CML |
| 本文献已被 维普 等数据库收录！ |
| 点击此处可从《半导体学报》浏览原始摘要信息 |
| 点击此处可从《半导体学报》下载免费的PDF全文 |
|
