Bias-dependent timing jitter of 1-GHz sinusoidally gated InGaAs/InP avalanche photodiode

We characterized the dependence of the timing jitter of an InGaAs/InP single-photon avalanche diode on the excess bias voltage (V_ex) when operated in 1-GHz sinusoidally gated mode. The single-photon avalanche diode was cooled to -30 degrees Celsius. When the V_ex is too low (0.2 V-0.8 V) or too high (3 V-4.2 V), the timing jitter is increased with the V_ex, particularly at high V_ex. While at middle V_ex (1 V-2.8 V), the timing jitter is reduced. Measurements of the timing jitter of the same avalanche diode with pulsed gating show that this effect is likely related to the increase of both the amplitude of the V_ex and the width of the gate-on time. For the 1-GHz sinusoidally gated detector, the best jitter of 93 ps is achieved with a photon detection efficiency of 21.4% and a dark count rate of ~2.08×10^-5 per gate at the V_ex of 2.8 V. To evaluate the whole performance of the detector, we calculated the noise equivalent power (NEP) and the afterpulse probability (P_ap). It is found that both NEP and P_ap increase quickly when the V_ex is above 2.8 V. At 2.8-V V_ex, the NEP and P_ap are ~2.06×10^-16 W/Hz^1/2 and 7.11%, respectively. Therefore, the detector should be operated with V_ex of 2.8 V to exploit the fast time response, low NEP and low P_ap.