Distribution of electron traps in SiO_2/HfO_2 nMOSFET

In this paper, the principle of discharge-based pulsed I-V technique is introduced. By using it, the energy and spatial distributions of electron traps within the 4-nm HfO₂ layer have been extracted. Two peaks are observed, which are located at ΔE~-1.0 eV and -1.43 eV, respectively. It is found that the former one is close to the SiO₂/HfO₂ interface and the latter one is close to the gate electrode. It is also observed that the maximum discharge time has little effect on the energy distribution. Finally, the impact of electrical stress on the HfO₂ layer is also studied. During stress, no new electron traps and interface states are generated. Meanwhile, the electrical stress also has no impact on the energy and spatial distribution of as-grown traps. The results provide valuable information for theoretical modeling establishment, material assessment, and reliability improvement for advanced semiconductor devices.