Improvement in the electrical performance and bias-stress stability of dual-active-layered silicon zinc oxide/zinc oxide thin-film transistor |
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Affiliation: | 1.The School of Electronic and Information Engineering, South China University of Technology, Guangzhou 510640, China;2.National Engineering Technology Research Center for Mobile Ultrasonic Detection, South China University of Technology, Guangzhou 510640, China;3.Department of Electrical and Electronic Engineering, the University of Hong Kong, Pokfulam Rd., Hong Kong, China |
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Abstract: | Si-doped zinc oxide (SZO) thin films are deposited by using a co-sputtering method, and used as the channel active layers of ZnO-based TFTs with single and dual active layer structures. The effects of silicon content on the optical transmittance of the SZO thin film and electrical properties of the SZO TFT are investigated. Moreover, the electrical performances and bias-stress stabilities of the single- and dual-active-layer TFTs are investigated and compared to reveal the effects of the Si doping and dual-active-layer structure. The average transmittances of all the SZO films are about 90% in the visible light region of 400 nm-800 nm, and the optical band gap of the SZO film gradually increases with increasing Si content. The Si-doping can effectively suppress the grain growth of ZnO, revealed by atomic force microscope analysis. Compared with that of the undoped ZnO TFT, the off-state current of the SZO TFT is reduced by more than two orders of magnitude and it is 1.5×10-12 A, and thus the on/off current ratio is increased by more than two orders of magnitude. In summary, the SZO/ZnO TFT with dual-active-layer structure exhibits a high on/off current ratio of 4.0×106 and superior stability under gate-bias and drain-bias stress. |
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Keywords: | thin film transistor (TFT) silicon-doped zinc oxide dual-active-layer structure bias-stress stability |
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