A low-power 10-bit 250-KSPS cyclic ADC with offset and mismatch correction |
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| Authors: | Zhao Hongliang Zhao Yiqiang Geng Junfeng Li Peng Zhang Zhisheng |
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| Institution: | 1. School of Electronic Information Engineering, Tianjin University, Tianjin 300072, China;College of Physics, Liaoning University, Shenyang 110036, China
2. School of Electronic Information Engineering, Tianjin University, Tianjin 300072, China |
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| Abstract: | A low power 10-bit 250-k sample per second(KSPS) cyclic analog to digital converter(ADC) is presented. The ADC's offset errors are successfully cancelled out through the proper choice of a capacitor switching sequence.The improved redundant signed digit algorithm used in the ADC can tolerate high levels of the comparator's offset errors and switched capacitor mismatch errors.With this structure,it has the advantages of simple circuit configuration,small chip area and low power dissipation.The cyclic ADC man... |
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| Keywords: | cyclic ADC improved RSD algorithm low power offset cancelling |
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