| A digital calibration technique for an ultra high-speed wide-bandwidth folding and interpolating analog-to-digital converter in 0.18-μm CMOS technology |
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| 引用本文： | 余金山,张瑞涛,张正平,王永禄,朱璨,张磊,俞宙,韩勇.A digital calibration technique for an ultra high-speed wide-bandwidth folding and interpolating analog-to-digital converter in 0.18-μm CMOS technology[J].半导体学报,2011,32(1):108-115. |
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| 作者姓名： | 余金山 张瑞涛 张正平 王永禄 朱璨 张磊 俞宙 韩勇 |
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| 作者单位： | National Laboratory of Analog IC's;12th Institute of CETC;School of Computer University of Defense Technology; |
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| 基金项目： | Project supported by the National Natural Science Foundation of China(Nos.60906009,60773025); the Postdoctoral Science Foundation of China(No.20090451423); the National Labs of Analog Integrated Circuits Foundation(No.9140C0901110902) |
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| 摘 要： | A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital converter in 0.18-μm CMOS technology is presented.The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter,which are based on well-designed calibration reference, calibration DAC and comparators.The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input.
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| 关 键 词： | ultra high-speed wide-bandwidth folding interpolating analog-to-digital converter |
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