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量子全加器设计
引用本文:常丽,朱宇祥,蒋辉.量子全加器设计[J].电子学报,2019,47(9):1863-1867.
作者姓名:常丽  朱宇祥  蒋辉
作者单位:沈阳工业大学信息科学与工程学院,辽宁沈阳,110870;沈阳工业大学信息科学与工程学院,辽宁沈阳,110870;沈阳工业大学信息科学与工程学院,辽宁沈阳,110870
基金项目:沈阳市科技局科研计划项目
摘    要:量子全加器是量子计算机的基本单元,为了减少能耗,降低构造成本及物理实现难度,本文提出一种新型n位量子全加器,使用3n个CNOT(Controlled NOT)门和2n-1个Toffoli门实现n位量子加减法,采用超前进位方式,不含进位输入,通过最高溢出标志位判断加法的进位和减法的正负号,标志位不参与高低位计算,不增加电路延时,适合n位量子并行计算.随机生成4、8、16和32位数分别进行加减仿真操作,验证了全加器的正确性.该全加器量子代价较低,结构简单,有利于提高集成电路规模和集成度.

关 键 词:可逆逻辑电路  量子全加器  超前进位  量子代价  电路能耗  量子计算机
收稿时间:2018-11-20

Design of Quantum Full Adder
CHANG Li,ZHU Yu-xiang,JIANG Hui.Design of Quantum Full Adder[J].Acta Electronica Sinica,2019,47(9):1863-1867.
Authors:CHANG Li  ZHU Yu-xiang  JIANG Hui
Institution:School of Information Science and Engineering, Shenyang University of Technology, Shenyang, Liaoning 110870, China
Abstract:Quantum full adder is the basic elements of quantum computers,in order to reduce the energy loss and cut the construction cost and the difficulty of physical realization.The paper proposes a new type of n-bit quantum full adder which uses 3n CNOT(Controlled NOT) Gates and 2n-1 Toffoli gates to implement n-bit quantum addition and subtraction,adopts the carry look-ahead mode without carry input,and judges the carry of addition and positive and negative sign of subtraction with the highest overflow mark bit that does not participate in the calculation of high and low bit,which does not increase time delay of the circuit and suits for n-bit quantum parallel operation.The simulation operation with random number of 4,8,16 and 32 digits verifies the correctness of the full adder separately.The low quantum cost and simple circuit structure of the quantum full adder is helpful to improve the size and integration of integrated circuits.
Keywords:reversible logic circuit  quantum full adder  carry look-ahead  quantum cost  circuit energy consumption  quantum computer  
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