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具有L型源极场板的双槽绝缘体上硅高压器件新结构
引用本文:石艳梅,刘继芝,姚素英,丁燕红,张卫华,代红丽. 具有L型源极场板的双槽绝缘体上硅高压器件新结构[J]. 物理学报, 2014, 63(23): 237305-237305. DOI: 10.7498/aps.63.237305
作者姓名:石艳梅  刘继芝  姚素英  丁燕红  张卫华  代红丽
作者单位:1. 天津大学电子信息工程学院, 天津 300072;2. 天津理工大学电子信息工程学院, 天津 300384;3. 电子科技大学微电子与固体电子学院, 成都 610054
基金项目:国家自然科学基金(批准号:51101113);天津市自然科学基金(批准号:13JCQNJC,14JCYBJC16200)资助的课题~~
摘    要:为了提高小尺寸绝缘体上硅(SOI)器件的击穿电压,同时降低器件比导通电阻,提出了一种具有L型源极场板的双槽SOI高压器件新结构.该结构具有如下特征:首先,采用了槽栅结构,使电流纵向传导面积加宽,降低了器件的比导通电阻;其次,在漂移区引入了Si O2槽型介质层,该介质层的高电场使器件的击穿电压显著提高;第三,在槽型介质层中引入了L型源极场板,该场板调制了漂移区电场,使优化漂移区掺杂浓度大幅增加,降低了器件的比导通电阻.二维数值仿真结果表明:与传统SOI结构相比,在相同器件尺寸时,新结构的击穿电压提高了151%,比导通电阻降低了20%;在相同击穿电压时,比导通电阻降低了80%.与相同器件尺寸的双槽SOI结构相比,新结构保持了双槽SOI结构的高击穿电压特性,同时,比导通电阻降低了26%.

关 键 词:绝缘体上硅  槽栅  比导通电阻  击穿电压
收稿时间:2014-06-30

A dual-trench silicon on insulator high voltage device with an L-shaped source field plate
Shi Yan-Mei,Liu Ji-Zhi,Yao Su-Ying,Ding Yan-Hong,Zhang Wei-Hua,Dai Hong-Li. A dual-trench silicon on insulator high voltage device with an L-shaped source field plate[J]. Acta Physica Sinica, 2014, 63(23): 237305-237305. DOI: 10.7498/aps.63.237305
Authors:Shi Yan-Mei  Liu Ji-Zhi  Yao Su-Ying  Ding Yan-Hong  Zhang Wei-Hua  Dai Hong-Li
Abstract:To improve the breakdown voltage and reduce the specific on-resistance of a small size silicon on insulator (SOI) device, a dual-trench SOI high voltage device with an L-shaped source field plate is proposed. The device has the features as follows: first, a trench gate is adopted. The trench gate widens the current conduction area and makes the current conduction path shorter, thus lowering the specific on-resistance. Second, a SiO2 dielectric layer is introduced into the drift region. This dielectric layer can hold a high electric field, which makes the breakdown voltage greatly increased. Third, an L-shaped source field plate is introduced. This field plate modulates the electric field in the drift region, so increases the optimized doping concentration of the drift region significantly and reduces the specific on-resistance. The results from the two-dimensional semiconductor simulator show that as compared with a conventional SOI device at the same cell pitch, the breakdown voltage is increased by 151%, and the specific on-resistance is reduced by 20%. The specific on-resistance is reduced by 80% at the same breakdown voltage. Compared with a dual-trench SOI device with the same cell pitch, the proposed device maintains the same high breakdown voltage as the dual- trench SOI device, and at the same time, the specific on-resistance is decreased by 26%.
Keywords:silicon on insulatortrench gatespecific on-resistancebreakdown voltage
Keywords:silicon on insulator  trench gate  specific on-resistance  breakdown voltage
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