Valence band variation in Si (110) nanowire induced by a covered insulator

In this work, we investigate strain effects induced by thedeposition of gate dielectrics on the valence band structures in Si(110) nanowire via the simulation of strain distribution and thecalculation of a generalized 6× 6k.p strainedvalence band. The nanowire is surrounded by the gate dielectric. Oursimulation indicates that the strain of the amorphous SiO₂insulator is negligible without considering temperature factors. Onthe other hand, the thermal residual strain in a nanowire withamorphous SiO₂ insulator which has negligible lattice misfitstrain pushes the valence subbands upwards by chemical vapourdeposition and downwards by thermal oxidation treatment. In contrastwith the strain of the amorphous SiO₂ insulator, the strain ofthe HfO₂ gate insulator in Si (110) nanowire pushes the valencesubbands upwards remarkably. The thermal residual strain byHfO₂ insulator contributes to the up-shifting tendency. Oursimulation results for valence band shifting and warping in Sinanowires can provide useful guidance for further nanowire devicedesign.