Affiliation: | aSTMicroelectronics, 850 Rue Jean Monnet, 38921 Crolles Cedex, France bCEA-DRT, LETI/D2NT and DPTS, CEA-GRE, 17 Avenue des Martyrs, 38054 Grenoble Cedex, France |
Abstract: | We have first of all studied (in reduced pressure–chemical vapour deposition) the high-temperature growth kinetics of SiGe in the 0–100% Ge concentration range. We have then grown very high Ge content (55–100%) SiGe virtual substrates at 850 °C. We have focused on the impact of the final Ge concentration on the SiGe virtual substrates’ structural properties. Polished Si0.5Ge0.5 virtual substrates were used as templates for the growth of the high Ge concentration part of such stacks, in order to minimize the severe surface roughening occurring when ramping up the Ge concentration. The macroscopic degree of strain relaxation increases from 99% up to values close to 104% as the Ge concentration of our SiGe virtual substrates increases from 50% up to 100% (discrepancies in-between the thermal expansion coefficients of Si and SiGe). The surface root mean square roughness increases when the Ge concentration increases, reaching values close to 20 nm for 100% of Ge. Finally, the field (the pile-up) threading dislocations density (TDD) decreases as the Ge concentration increases, from 4×105 cm−2 (1–2×105 cm−2) for [Ge]=50% down to slightly more than 1×105 cm−2 (a few 104 cm−2) for [Ge]=88%. For [Ge]=100%, the field TDD is of the order of 3×106 cm−2, however. |