载流子穿越具有双Mot势垒的半导体晶界的输运行为

讨论了穿越具有双Mot势垒的n型半导体晶界的载流子输运行为，重点分析了受主缺陷扩散层对偏压下晶界势垒、直流电流、非线性特性和电容等的作用．晶界势垒在偏压下的变化决定了载流子穿越晶界的输运行为分为预击穿、击穿和回复三个区域．受主缺陷扩散层的存在改变了势垒及其偏压关系，使电流的变化和非线性特性大幅度加强，很大程度上决定了预击穿区的漏电流；同时也使势垒加宽而减小高频电容，但使直流偏压下因晶界电荷的共振响应而产生的电容峰值增大关键词：

CARRIER TRANSPORT THROUGH A SEMICONDUCTOR GRAIN BOUNDARY WITH A DOUBLE MOTT BARRIER

Carrier transport through an n-type semiconductor grain boundary with a double Mott barrier consisting carrier depletion layers,acceptor defect layers (ACLs) on grain surface and negative-charged interface by trapping of majority carriers is studied.The effect of ACL on the barrier,current,nonlinearity and capacitance is especially treated.The change of barrier under bias governs transport properties,and ascertains the existance of pre-breakdown,breakdown and upturn regions.ACLs result in a change of barrier and its intensifying decline under bias,and thus enhance the current change and nonlinearity,and largely determine the leakage current.And ACLs reduce capacitance at high frequency by broaden barrier but increase capacitance peak originated from the resonant response of interface charge under bias.