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A VLSI design for a trace-back Viterbi decoder |
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| Authors: | Truong TK Shih M-T Reed IS Satorius EH |
| Institution: | Commun. Syst. Res. Section, Jet Propulsion Lab., Pasadena, CA; |
| Abstract: | A systolic Viterbi decoder for convolutional codes is developed which uses the trace-back method to reduce the amount of data needed to be stored in registers. It is shown that this new algorithm requires a smaller chip size and achieves a faster decoding time than other existing methods |
| Keywords: | |