| 高速数字电路相位噪声测试研究 |
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| 引用本文： | 蒲璞,崔庆林,蒲林.高速数字电路相位噪声测试研究[J].微电子学,2009,39(3). |
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| 作者姓名： | 蒲璞 崔庆林 蒲林 |
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| 作者单位： | 1. 中国电子科技集团公司,第二十四研究所,重庆,400060
2. 中国电子科技集团公司,第二十四研究所,重庆,400060;模拟集成电路国家级重点实验室,重庆,400060 |
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| 基金项目： | 模拟集成电路国家级重点实验室基金 |
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| 摘 要： | 对高速数字电路相位噪声测试技术进行了探索.利用直接频谱仪法、鉴相器法、鉴频器法等相位噪声测试方法,通过阻抗匹配等合理的测试设计,开发出测试系统,对高速数字电路相位噪声进行了测试研究,获得了准确的测试数据,有效地表征了电路实际性能.
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| 关 键 词： | 数字电路 相位噪声 鉴相器 鉴频器 阻抗匹配 |
Study on Phase Noise Test of High-Speed Digital ICs |
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| PU Pu,CUI Qinglin,PU Lin.Study on Phase Noise Test of High-Speed Digital ICs[J].Microelectronics,2009,39(3). |
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| Authors: | PU Pu CUI Qinglin PU Lin |
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| Institution: | 1.Sichuan Institute of Solid-State Circuits;China Electronics Technology Group Corp.;Chongqing 400060;P.R.China;2.National Laboratory of Analog Integrated Circuits;P.R.China |
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| Abstract: | An investigation was made into techniques for testing phase noise of high-speed digital ICs.Using several phase noise test methods,such as direct spectrum analyzer,phase detector and frequency detector methods,a test system was developed,through reasonable test design,such as impedance matching,to study phase noise of high-speed digital ICs,and accurate test data were obtained,which correctly characterize performance of ICs under test. |
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| Keywords: | Digital IC Phase noise Phase detector Frequency detector Impedance matching |
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