| 一种适用于智能卡应用的RSA协处理器 |
| |
| 引用本文： | 梁松海,张武健,周润德,羊性滋,葛元庆.一种适用于智能卡应用的RSA协处理器[J].微电子学,1999,29(1):12. |
| |
| 作者姓名： | 梁松海 张武健 周润德 羊性滋 葛元庆 |
| |
| 作者单位： | 清华大学微电子学研究所,北京,100084 |
| |
| 摘 要： | Based on the microprocessor structure，an RSA coprocessor
for improved Montgomery algorithm has been designed．The functional units of this
coprocessor operate concurrently，and up to three instructions can be issued in one cycle．A
mixed form of three-stage and two-stage pipelined structure is used for instruction
execution，and the coprocessor and CPU core can share a common RAM memory through a set
of switches under control．The structure of the coprocessor can be expanded to contain
more than one multiplier-accumulator units for higher performance．
|
| 关 键 词： | 微处理器 智能卡 RSA算法 Montgomery算法 RSA协处理器 |
| 修稿时间： | 1998-06-08 |
Design of an RSA Coprocessor for Smart Card Application |
| |
| LIANG Song-Hai,ZHANG Wu-Jian,ZHOU Run-De,YANG Xing-Zi,GE Yuan-Qing.Design of an RSA Coprocessor for Smart Card Application[J].Microelectronics,1999,29(1):12. |
| |
| Authors: | LIANG Song-Hai ZHANG Wu-Jian ZHOU Run-De YANG Xing-Zi GE Yuan-Qing |
| |
| Abstract: | Based on the microprocessor structure,an RSA coprocessor for improved Montgomery algorithm has been designed.The functional units of this coprocessor operate concurrently,and up to three instructions can be issued in one cycle.A mixed form of three stage and two stage pipelined structure is used for instruction execution,and the coprocessor and CPU core can share a common RAM memory through a set of switches under control.The structure of the coprocessor can be expanded to contain more than one multiplier accumulator units for higher performance. |
| |
| Keywords: | Microprocessor Smart card RSA algorithm Montgomery algorithm RSA coprocessor |
| 本文献已被 CNKI 万方数据 等数据库收录！ |
|
