| 基于FPGA的QPSK高速解调器的设计与实现 |
| |
| 引用本文： | 宋广怡,彭继强.基于FPGA的QPSK高速解调器的设计与实现[J].无线电工程,2006,36(5):47-49. |
| |
| 作者姓名： | 宋广怡 彭继强 |
| |
| 作者单位： | 中国电子科技集团公司第54研究所,河北,石家庄,050081 |
| |
| 摘 要： | 根据无人机系统对数据链路的高速率、低误码的需求,分析比较了QPSK数字中频解调与零中频解调2种方案。针对本系统的特点,采用FPGA及DSP设计实现了一种高速QPSK数字零中频解调器,同时简要分析了高速数字解调器的工作原理,并介绍了高速解调器的硬件与软件实现。
|
| 关 键 词： | QPSK 零中频 FPGA |
| 收稿时间： | 2005-11-12 |
| 修稿时间： | 2005年11月12 |
Design and Implementation of QPSK High Speed Demodulator Based on FPGA |
| |
| SONG Guang-yi,PENG Ji-qiang.Design and Implementation of QPSK High Speed Demodulator Based on FPGA[J].Radio Engineering of China,2006,36(5):47-49. |
| |
| Authors: | SONG Guang-yi PENG Ji-qiang |
| |
| Institution: | The 54th Research Institute of CETC, Shijiazhuang Hebei 050081, China |
| |
| Abstract: | According to the requirement for data link’s high speed and low error rate of UAV system, we analyze and compare two methods of QPSK digital IF demodulation and zero-IF demodulation. We use FPGA and DSP to design and implement a high-speed QPSK digital zero-IF demodulator according to the characteristic of this system. We analyze the operation principle and the hardware/software implementation of the high-speed demodulator. |
| |
| Keywords: | QPSK FPGA |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
