一种基于门控时钟的低功耗电路实现方案

研究了门控时钟技术在130 nm工艺、基于高阈值标准单元库下的低功耗物理实现方法。详细阐述了多级门控时钟技术的作用机制和参数的设置方法,给出了基于门控时钟的后端实现流程,着重分析了插入门控时钟对时钟偏移的影响并提出解决方案。在中芯国际130 nm工艺下用synopsys公司的DC,IC Compiler,PT,VCS等工具完成物理实现。在10 M时钟下,总功耗降低22.6%,面积也有所减小。

Implementation of Clock-gating Technology In Low-Power Circuit Design

This article researches the low-power physical implementation method of clock-gating technology based on 130 nm process and high threshold standard cell library.The author particularly expatiates the function mechanism and the setting method of parameters of multistage clock-gating,shows the back-end flow based on clock-gating technology,and analyzes the impact of clock skew when clock-gating is inserted then solves this issue.The physical implementation is finished by using DC,ICC,PT,VCS of Synopsys under ...