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Construction of a reconfigurable dynamic logic cell
Authors:K Murali  Sudeshna Sinha  William L Ditto
Institution:(1) Department of Physics, Anna University, 600 025 Chennai, India;(2) The Institute of Mathematical Sciences, Taramani, 600 113 Chennai, India;(3) Department of Biomedical Engineering, University of Florida, 326611-6131 Gainesville, FL, USA
Abstract:We report the first experimental realization of all the fundamental logic gates, flexibly, using a chaotic circuit. In our scheme a simple threshold mechanism allows the chaotic unit to switch easily between behaviours emulating the different gates. We also demonstrate the combination of gates through a half-adder implementation.
Keywords:Nonlinear circuits  logic gates  computer architecture
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