连接复杂度对非对称FPGA功耗的影响

FPGA因为开发周期短、使用灵活、价格低廉等优点,在嵌入式系统中被广泛应用.随着开发需求的扩大,嵌入有DSP、MCU等宏模块的非对称FPGA应运而生.本文根据非对称FPGA的结构,研究连接复杂度Fc参数对功耗的影响.在不同Fc参数的非对称FPGA结构下对MCNC电路仿真,实验结果表明输入Fc参数在80%,输出Fc参数在70%时,其功耗最低.与Fc参数100%相比,输入Fc参数在80%时,平均功耗减少25.76%,最高功耗减少29.08%;输出Fc参数在70%时,平均功耗减少27.07%,最高功耗减少43.83%.这对低功耗非对称FPGA架构设计有一定的意义.

Flexibility of connection impact the power of heterogeneous FPGA

FPGA is widely used in embedded systems because of short development cycle,flexibility and low cost.In order to enhance the application,heterogeneous FPGA is researched with micro block such as DSP,MCU.The article studies how Fc（Flexibility of connection） impacts the power consumption of heterogeneous FPGA.Based on the simulation of MCNC circuit with different Fc parameter in heterogeneous FPGA,the experiment results show that the power is lowest when Fc_input is 80% and Fc_output is 70%.It can reduce power 25.76% in average and 29.08% in most when Fc_input is 80% compared with Fc_input is 100%.Also it can reduce power 27.07% in average and 43.83% in most when Fc_out is 70% compared with Fc_output is 100%.It＇s important to the low power design of architecture in heterogeneous FPGA.