A Fast and Precise Blind I/Q Mismatch Compensation for Image Rejection in Direct‐Conversion Receiver |
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| Authors: | Suna Kim Dae‐Young Yoon Hyung Chul Park Giwan Yoon Sang‐Gug Lee |
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| Institution: | 1. Suna Kim (phone: +82 42 350 5491, suna.kim@kaist.ac.kr), Dae‐Young Yoon (dyyoon07@kaist.ac.kr), Giwan Yoon (gwyoon@ee.kaist.ac.kr), and Sang‐Gug Lee (sglee@ee.kaist.ac.kr) are with the Department of Electrical engineering, KAIST, Daejeon, Rep. of Korea.;2. Hyung Chul Park (hcpark@seoultech.ac.kr) is with the Department of Electronic and IT Media Engineering, Seoul National University of Science and Technology, Seoul, Rep. of Korea. |
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| Abstract: | In this paper, we propose a new digital blind in‐phase/quadrature‐phase (I/Q) mismatch compensation technique for image rejection in a direct‐conversion receiver (DCR). The proposed image‐rejection circuit adopts DC offset cancellation and a sign‐sign least mean squares (LMS) algorithm with a unique step size adaptation both for a fast and precise I/Q mismatch estimation. In addition, several performance‐optimizing design considerations related to accuracy, speed, and hardware simplicity are discussed. The implementation of the proposed circuit in an FPGA results in an image‐rejection ratio (IRR) of 65 dB, which is the best performance with modulated signals, along with an adaptation time of 0.9 seconds, which is a tenfold increase in the compensation speed as compared to previously reported circuits. The proposed technique will be a promising solution in the area of image rejection to increase both the speed and accuracy of future DCRs. |
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| Keywords: | Image rejection I/Q gain mismatch I/Q phase mismatch DC offset direct‐conversion receiver DCR low‐IF zero‐IF LMS algorithm adaptive step size |
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