片上网络拓朴优化:在离散平面上布局与布线

微系统芯片(System-on-Chip,SoC)发展到今天,集成密度指数增长和芯片面积的急剧膨胀使得全局连线的延时上升,可靠性下降,成为集成电路的设计瓶颈.片上网络(Network-on-Chip,NoC)是解决整个芯片上数据有效传输的结构之一,以片上网络为基础通信架构的微系统芯片称为片上网上系统芯片(System-on-Network-on-Chip,SoNoC).微系统芯片内通信模式兼有随机性和确定性,应该根据特定应用的通信特征设计片上网络.本文在确定SoNoC设计流程的基础上,根据SoNoC的通信特征,选择了合适的离散平面结构,对SoNoC的运算及控制等模块进行布局、对模块间的通信依赖关系进行布线,发展出FRoD(Floor-plan and Routing on Discrete Plane)算法,以自动生成片上网络的拓扑结构.该算法定义了离散平面的一般表示方法,并在四种典型的离散平面上使用不同规模的随机系统完成了系列实验.为了处理系统和网络之间的耦合关系,逐点分裂的布局算法可以逐步学习和适应系统的通信需求,同时优化系统的执行时间和通信能量,在运行随机任务流图的模拟系统上与随机布局结果相比可以节省30%左右的通信能量,20%左右的系统通信时间.串行、并行和串并混合的布线算法使用最短路径把通信关系分布在离散平面的通道上,使不同的通信关系尽量复用网络通道,与全连接网络相比可以节省10%到30%的面积代价.     

基于遗传算法的NoC互连测试研究

针对互连测试难题的分析,提出一种基于遗传算法的NoC互连测试方案。该方案采用NoC重用测试机制的方法,在功耗限制条件下,选取合适的测试端口和最短测试路径,同时根据互连测试中实际存在的问题,对算法进行适当改进,建立基于遗传算法的NoC互连测试模型,旨在获取最优矢量集的同时,测试代价更小。当NoC的规模达到一定程度时,采用划分测试方法,缩短测试路径,降低测试时间,提高测试效率。以SoCIN结构电路为仿真平台,分别对不同规模的NoC进行实验仿真。实验结果表明,遗传算法能快速有效地收敛到最优解,在测试运行代数及测试生成时间上取得了良好的测试效果。     

一种基于微环的新型4×4非阻塞光路由开关

光互连技术因诸多特性优于电互连而成为片上多核互连最具前景的解决方案。为了提高片上光互连网络架构的性能,采取光器件模块搭建的方法,提出了一种基于微环的新型4×4光路由开关,仅用7个微环构建的拓扑结构便实现了4个双向端口的非阻塞交换,降低了功耗和面积;波导交叉的数量减少到6个,优化了插入损耗。结果表明,该结构相对于经典结构光器件的功耗节省了约8%,光互连层的插入损耗降低了约7%。     

优化NoC性能的存储和通信压缩

文中针对NoC体系结构,提出了两种数据压缩技术,被称为高速缓存压缩和网络接口控制(NIC)内的压缩.性能实测结果指示压缩能够使NoC设计在较低的网络延迟、较低的功耗和改进应用性能等方面获得优势.     

一种片上网络路由测试方法研究

对片上网络路由器的结构进行了分析,建立了相应的故障模型.针对此故障模型结合内建自测试,提出了一种基于量子遗传算法的测试矢量传递路径寻优方法.该算法具有收敛速度快,精度高等优点.最后通过对测试故障覆盖率和测试时间进行分析表明这种测试方法具有较高的故障覆盖率、较少的测试时间.     

New Latency Model for Dynamic Frequency Scaling on Network-on-Chip

Modulating both the clock frequency and supply voltage of the network-on-chip （NoC） during runtime can reduce the power consumption and heat flux, but will lead to the increase of the latency of NoC. It is necessary to find a tradeoff between power consumption and communication latency. So we propose an analytical latency model which can show us the relationship of them. The proposed model to analyze latency is based on the M/G/1 queuing model, which is suitable for dynamic frequency scaling. The experiment results show that the accuracy of this model is more than 90%.     

智能终端中热IP核的通信方法

片上网络通信架构的改进,使热IP核连接多个路由器,并且原本与热IP核相连的一个路由器的通信量被分配到多个路由器上。基于改进的片上网络通信架构,又设计出新的路由器选择算法。在该算法中,可以根据热IP连接的路由器的当前状态选择数据通信的路由,这样使得热IP能够更加均匀地分配通信量,从而有效地提高了数据传输效率,降低数据传输延时。实验表明,新的算法能够有效减少传输延迟。     

CPCA: An efficient wireless routing algorithm in WiNoC for cross path congestion awareness

Wireless network-on-chip (WiNoC) is a new paradigm to mitigate the long-distance transmission latency for conventional wired network-on-chip. The wireless routers in WiNoC have to handle a large number of packets which could cause data congestion, thus reducing the network performance. In this paper, we propose a novel wireless routing algorithm, called CPCA, which exploits the cross path congestion information as hints to route the packets. Under CPCA, the whole network is partitioned into sub-networks. In each subnet, the congestion information of the wireless router is propagated along the cross path. As a result, the routers in the same dimension can get the congestion degree of wireless router within the subnet. Based on the congestion information, CPCA can compute the suitable path for packets routing, which can prominently avoid the congestion aggravation in the wireless router. Experimental results show that our proposed method can effectively improve performance in terms of packets transmission latency and network throughput.     

一种自适应的混合型无线NoC拓扑结构

针对传统大规模片上网络（Network-on-Chip,NoC）远距离核间多跳通信所带来的高能耗与延时问题,提出了一种基于虚Torus的自适应的混合型无线NoC拓扑结构（VT-AWiNoC）．该结构通过引入链路拥塞测度作为感知参数,基于此采用热点无线链路自动探测与带宽动态分配机制,并设计实现发送器动态分配的控制电路模块,以达到根据不同的通信流量模型,于片内自适应地调整拓扑结构及链路带宽的目的．通过建立混合型无线NoC的延时与功耗评估模型,对该结构的无线NoC进行性能评估．实验结果表明,该自适应拓扑与其它混合型无线NoC相比,在随机流量模型下,网络平均延时降低了16．52～23．27％;在20％的热点流量模型下,包平均能耗节省了39．19％;以真实应用FFT作为基准测试,平均延时降低了17．20％～21．68％,并节省了23．49％的包平均能耗．该结构以较小的面积开销获得了更优的性能．     

A novel energy-aware multi-task dynamic mapping heuristic of NoC-based MPSoCs

Task mapping is an important issue in network-on-chip (NoC)-based multiprocessor systems-on-chips (MPSoCs) design. The dynamic characteristic of application execution enforces the use of dynamic task mapping. In this article, a hybrid energy-aware dynamic mapping strategy is proposed. The strategy consists of an off-line part and an on-line part. In the off-line part, optimisation tools are used to extract information that helps to reduce the energy consumption in the on-line mapping, while the on-line mapping heuristic makes use of the information. Experimental result shows that the energy consumption is reduced by 21%, on average, compared to the best neighbour heuristic.