Tailoring the dielectric properties and energy storage density of 1−x(0.94NaNbO3−0.06SZ)−xBi2O3 through substitution strategy

Energy storage using dielectric capacitors is a growing area of research and development. However, designing a highly performing dielectric capacitor is still a challenge. Despite the excellent results achieved in lead-based dielectrics, lead-free substitutes are essential because of the environmental concerns associated with lead-based products. The lead-free 1?x (0.94NaNbO₃? 0.06SrZrO₃)+ x Bi₂O₃ ceramics abbreviated NNSZ + xB for x = 0.0, 0.05, 0.1, 0.15, and 0.20 was fabricated via solid-state reaction. A recoverable energy density of 2.93 J cm?³ was obtained for NNSZ+0.1B, associated with high thermal stability (25–130 °C), excellent cycling (N = 10⁵), and high efficiency (η) of 83.5%. Moreover, the introduction of Bi₂O₃ significantly improved the electrical insulation (?_r at 1 kHz = 1608 and tan δ = 0.0038) and breakdown strength (380 kVcm?¹) of NNSZ+0.1B by minimizing the formation of sodium, bismuth, and oxygen vacancies. The results obtained in this study provide a benchmark for further investigations on NaNbO₃-based ceramics. More importantly, this study suggests that NNSZ + xB ceramics can be used in pulsed power technology.     

Data Randomization Scheme for Endurance Enhancement and Interference Mitigation of Multilevel Flash Memory Devices

In this letter, we propose a data randomization scheme for endurance and interference mitigation of deeply‐scaled multilevel flash memory. We address the relationships between data patterns and the raw bit error rate. An on‐chip pseudorandom generator composed of an address‐based seed location decoder is developed and evaluated with respect to uniformity. Experiments performed with 2x‐nm and 4x‐nm NAND flash memory devices illustrate the effectiveness of our scheme. The results show that the error rate is reduced up to 86% compared to that of a conventional cycling scheme. Accordingly, the endurance phenomenon can be mitigated through analysis of interference that causes tech shrinkage.     

Erase voltage impact on 0.18μm triple self-aligned split-gate flash memory endurance

The erase voltage impact on the 0.18μm triple self-aligned split-gate flash endurance is studied.An optimized erase voltage is necessary in order to achieve the best endurance.A lower erase voltage can cause more cell current degradation by increasing its sensitivity to the floating gate voltage drop,which is induced by tunnel oxide charge trapping during program/erase cycling.A higher erase voltage also aggravates the endurance degradation by introducing select gate oxide charge trapping.A progressive erase voltage method is proposed and demonstrated to better balance the two degradation mechanisms and thus further improve endurance performance.     

精密角接触球轴承的固体润滑失效分析

角接触球轴承是航天器的许多重要功能的实施部件，因而对其润滑性能的要求极为严格，迫切需要弄清其润滑失效机理。因此，对ＭｏＳ２溅射膜润滑的Ｃ６２０５球轴承进行了寿命试验，进而对经过丙酮超声清洗的各元件工作面的形貌和组成作了系统分析。     

纯电动汽车热管理系统的研究

随着世界各国对环境问题的日益重视,纯电动汽车已受到社会各界的广泛青睐,而电动汽车的发展,很大程度上受电池热管理系统、电机和电机驱动热管理系统、空调热管理系统三大系统技术成熟度的制约.本文将从结构布置和控制方式方面研究讨论,提供建议,以减少电池能耗,增加续航里程、提升整车可靠性和舒适性,希望能为EV热管理系统设计提供借鉴和参考.     

关于大学生对《大学生体育合格标准》承受能力的研究

以宁波大学为实例,在《大学生体育合格标准》的试行后通过对大学生心理、生理和能力等方面进行综合分析以及通过随机抽样、问卷表调查、座谈会等办法对各种数据(包括达标成绩、身体素质、形态机能、学习成绩)运用均数,标准差等统计方法进行分析处理,结果表明,实施《标准》既必要,也可行.在高校实施《大学生体育合格标准》的条件已基本具备,大学生对《标准》的各项要求是有承受能力的.     

一种新型摩托车耐久试验台的研制

介绍了摩托车耐久试验系统的硬件、软件实现方法，并阐述了用改进的PID算法控制摩托车车速的过程。     

High Performance β-Ga2O3 Schottky Barrier Transistors with Large Work Function TMD Gate of NbS2 and TaS2

Gallium trioxide, β-Ga₂O₃, has been recently studied due to its promising semiconducting properties as active material in transistors or Schottky diodes. Transistors with β-Ga₂O₃ channels are mostly metal oxide field effect transistors (MOSFET), and they show very negative threshold voltages (V_th) in general. Metal semiconductor field effect transistors (MESFETs) with top gate are also reported with less negative V_th. Still, β-Ga₂O₃ MESFETs are only a few. Here, bottom gate architecture β-Ga₂O₃ MESFETs using transition metal dichalcogenide (TMD) NbS₂ and TaS₂ are reported. Due to the large work functions of those metallic TMDs, the MESFETs display minimum subthreshold swing of 61 mV dec⁻¹, small V_th of −1.2 V, minimum OFF I_D of ≈100 fA, and maximum ON/OFF current ratio of ≈10⁸. Both β-Ga₂O₃ Schottky diodes with TaS₂ and NbS₂ display good junction stability even after 300 °C measurements in 10 mTorr vacuum. When the β-Ga₂O₃ MESFET with TaS₂ gate is integrated as a switching FET into an organic light emitting diode (OLED) circuit, it demonstrates long-term leakage endurance performance, maintaining an OLED brightness higher than 58% of the initial intensity after 100 s passes since the ON-switching point, which is even superior to the performance of conventional a-IGZO MOSFET switch.     

基于聚乙烯咔唑的非挥发型阻变存储特性分析

采用聚乙烯咔唑作为活性层构建了ITO/PVK/Al的三明治结构阻变存储元件,并对其阻变特性进行了测量。结果表明其具有明显的非挥发型双稳态阻变特性, 具有WORM存储特性。该元件具有良好的数据保持能力和耐久能力,开关态电流比可达103,且具有较低的阈值转换电压。分别对低阻态和高阻态的载流子传输机制进行了拟合, 低阻态为欧姆传导机制,高阻态为空间电荷限制电流发射机制。根据载流子传输机制, 对阻变特性进行了解释。     

衬底负偏置对FLASH器件耐久性退化的影响

研究了ETOXTM结构FLASH memory单元器件在VFG≈VD/2的热载流子写入应力条件下,衬底负偏置对单元器件耐久性退化的影响.结果表明:在既定的栅、漏偏置条件下,随着衬底负偏置的增加,器件耐久性退化会出现极小值.综合考虑了器件耐久性退化以及写入效率两方面的要求以后,确定了在VFG≈VD/2热载流子写入应力模式下,FLASH memory单元器件具有增强写入效率以及最小耐久性退化的最佳衬底负偏置条件.